Optimizing Storage Controller Chips to Meet Edge AI Demands

As AI technologies advance, they are placing unprecedented demands on personal computing devices and smartphones. These edge devices, which are becoming increasingly untethered from cloud data centers, must handle substantial computing loads, driven by AI models that often contain billions of parameters. With AI integration predicted to skyrocket, storage controller chips are facing growing pressure to deliver optimized performance to keep pace with these evolving workloads.

According to industry forecasts, by 2025 nearly half of all new personal computers will run AI models, including generative AI, locally. This shift is transforming edge computing, enabling devices like PCs and smartphones to process AI tasks without relying on cloud infrastructure. However, this advancement brings with it significant challenges for hardware, particularly in terms of memory, interconnect, and storage.

Storage systems in edge devices must excel in four critical areas to effectively support AI workloads: capacity, power efficiency, data efficiency, and security.

The massive datasets required by generative AI models demand extensive storage capacity. Applications such as image generation tools or AI-driven content creation software may require gigabytes, if not terabytes, of storage. For example, Microsoft’s Phi-3 language model, despite being compact, has 3.8 billion parameters and requires between 7 and 15 gigabytes of storage. As multiple AI applications coexist on a single device, storage needs will quickly surpass a terabyte.

While often overlooked, power efficiency is critical for edge devices, particularly mobile platforms where battery life is a priority. Storage components contribute significantly to power consumption, accounting for about 10% of a laptop’s power usage and roughly 5% in smartphones. As AI models and workloads expand, power-efficient storage solutions are essential to maintain extended operating hours without compromising performance.

Efficient use of storage space not only improves performance but also impacts access latency and the longevity of NAND flash storage. Storage controllers must manage how data is placed and retrieved from NAND flash to minimize latency and optimize flash endurance. Techniques like zoned namespaces (ZNS) and flexible data placement (FDP) can help ensure that data is stored in a way that optimizes both power and data efficiency, which is crucial for AI applications.

As AI models often represent years of research and development, their parameter files are highly valuable and must be protected. Developers require robust security protocols to safeguard these files from tampering or theft. Additionally, with more data processing occurring locally rather than in the cloud, users are increasingly storing sensitive personal information on their devices, further heightening the need for secure storage systems.

To meet these evolving demands, storage controllers must be specifically designed to handle the unique requirements of AI workloads on edge devices. A new generation of storage controllers is now available, optimized for AI-ready PCs and smartphones, each offering performance and efficiency enhancements tailored to their respective platforms.

For AI-enabled personal computers, raw storage performance and capacity are critical to support large AI models and multitasking environments. One example is Silicon Motion’s SM2508 controller, designed for high-performance AI workloads in PCs. The SM2508 controller features four PCIe Gen5 lanes for data transfer to the host and eight NAND channels, enabling sequential read speeds of up to 14.5 Gbytes per second. This high throughput ensures smooth operation even with complex, multi-tasking AI applications.

In addition to speed, the SM2508 can manage up to 8 terabytes of NAND flash, providing ample capacity for AI workloads that rely on vast amounts of data. To support this, system designers are leveraging the latest quad-level-cell (QLC) 3D NAND flash, which allows for dense storage. However, QLC chips are prone to unique error patterns as they age, requiring advanced error-correction algorithms to maintain reliability. Silicon Motion has developed a machine-learning-based error correction code (ECC) that adapts to these patterns over time, reducing latency and extending the lifespan of the storage system.

Power efficiency is also a significant concern in AI-ready PCs, especially given the intense computational loads AI models impose. The SM2508 controller is manufactured using TSMC’s 6 nm process, which allows for more efficient power management compared to previous generations built on 12 nm technology. By organizing the functional blocks within the chip and incorporating sophisticated power management features, Silicon Motion has managed to reduce power consumption by half.

Data management plays a crucial role in both power efficiency and overall performance. By optimizing how data is placed and managed within NAND flash, the SM2508 controller can reduce power usage by up to 70% compared to competing solutions. These enhancements ensure that AI workloads can run efficiently without draining battery life or reducing system performance.

Security is another essential pillar for AI-based systems. The SM2508 controller features a tamper-resistant design and uses a secure boot process to authenticate firmware, ensuring that the system remains protected from unauthorized access. The controller also complies with Opal full-disk encryption standards and supports AES 128/256 and SHA 256/384 encryption, securing data without compromising performance.

While the requirements for AI smartphones are similar to those of AI PCs—capacity, power efficiency, data efficiency, and security—mobile devices face additional constraints in size, weight, and battery life. For this market, Silicon Motion has developed the SM2756 controller, optimized for the mobile-optimized Universal Flash Storage (UFS) 4 specification.

UFS 4 offers significant performance improvements over UFS 3.1, and the SM2756 controller takes full advantage of these enhancements. With a 2-lane HS-Gear-5 interface and MPHY 5.0 technology, the controller achieves sequential read speeds of up to 4.3 Gbytes per second, allowing smartphones to load multi-billion-parameter AI models in under half a second. This fast-loading capability is crucial for AI applications to provide a seamless user experience.

To meet the capacity requirements of AI smartphones, the SM2756 controller supports tri-level and QLC 3D flash, managing up to 2 terabytes of storage. Power efficiency is another critical aspect, with the SM2756 achieving nearly 60% power savings when loading large AI parameter files compared to UFS 3 controllers.

Like its counterpart for PCs, the SM2756 leverages sophisticated firmware algorithms to optimize data placement and improve performance. Additionally, it includes anti-hacking measures to prevent unauthorized access during boot-up, ensuring data integrity and security on mobile devices.

As AI continues to evolve, pushing more workloads to edge devices like PCs and smartphones, the demands on storage systems will only intensify. Storage controller chips will play a pivotal role in ensuring that devices can handle the performance, capacity, power efficiency, and security requirements necessary to support AI applications. By developing controllers like the SM2508 and SM2756, Silicon Motion is paving the way for a new generation of AI-enabled devices, equipped to meet the challenges of the edge AI revolution.

Citations from Silicon Motion